IEEE Design

Results: 734



#Item
261Electronics manufacturing / IEEE standards / Electronic test equipment / Electronic design automation / Signal integrity / Oscilloscope / Joint Test Action Group / Printed circuit board / Nexus / Electronics / Electronic engineering / Technology

How to overcome/avoid High Frequency Effects on Debug Interfaces – Trace Port Design Guidelines An On-Chip Debugger/Analyzer (OCD) like iSYSTEM’s iC5000 (Figure 1) acts as a link to the target hardware by standard de

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Source URL: www.isystem.com

Language: English - Date: 2012-04-30 12:22:02
262Basiliscus / Legged robot / Mobile robot / Linkage / Metin Sitti / Running / Common basilisk / Mechanical engineering / Locomotion / Robot

698 IEEE TRANSACTIONS ON ROBOTICS, VOL. 24, NO. 3, JUNE 2008 Design and Development of the Lifting and Propulsion Mechanism for a Biologically

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Source URL: www.societyofrobots.com

Language: English - Date: 2012-12-02 12:41:09
263Endoscopy / Capsule endoscopy / Magnet / Enteroscopy / Neodymium magnet / Electric motor / Given Imaging / Gear / Electromagnetism / Physics / Magnetism

170 IEEE/ASME TRANSACTIONS ON MECHATRONICS, VOL. 15, NO. 2, APRIL 2010 Design, Fabrication, and Testing of a Capsule With Hybrid Locomotion for Gastrointestinal

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Source URL: www.iris.sssup.it

Language: English - Date: 2014-12-23 16:45:45
264Game theory / Mechanism design / Social choice theory / Kullback–Leibler divergence / Affect / Valuation / P-value / Scoring rule / Statistics / Statistical theory / Probability and statistics

IEEE TRANSACTION ON COMPUTERS, SPECIAL SECTION ON COMPUTATIONAL SUSTAINABILITY 1 Incentive Mechanisms for Community Sensing Boi Faltings, Jason Jingshi Li, Radu Jurca

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Source URL: liawww.epfl.ch

Language: English - Date: 2013-08-22 04:33:41
265Electronics / IEEE standards / Embedded systems / Joint Test Action Group / Boundary scan / OnTap / Design for testing / Field-programmable gate array / Berkeley Software Distribution / Electronics manufacturing / Manufacturing / Electronic engineering

onTAP® Series 4000 with ProScan B o u n d a r y S c a n

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Source URL: www.flynn.com

Language: English - Date: 2014-04-10 12:02:07
266Electronic engineering / Manufacturing / IEEE standards / Joint Test Action Group / Electronic design automation / Boundary scan / ProScan / Wiggler / DTS / Electronics / Embedded systems / Electronics manufacturing

onTAP® Series 4000 with ProScan B o u n d a r y S c a n

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Source URL: www.flynn.com

Language: English - Date: 2014-04-07 15:03:40
267Topology / Mathematics / Theoretical computer science / Applied mathematics / Constraint programming / Network flow / Network topology / Flow network

This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination. IEEE/ACM TRANSACTIONS ON NETWORKING 1 ILP Formulations for p-Cycle Design

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Source URL: www.eee.hku.hk

Language: English - Date: 2010-01-15 05:37:40
268Embedded systems / Debugging / Central processing unit / IEEE standards / Microprocessors / Nexus / Microcontroller / CPU design / Emulator / Electronics / Electronic engineering / Computing

Real-time Trace Reconstruction (RTR)

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Source URL: www.isystem.com

Language: English - Date: 2012-04-30 12:21:14
269Software development process / Barry Boehm / Capability Maturity Model / COBOL / Software quality / Software design / Software development methodology / Software engineer / IEEE Software / Computing / Software development / Software engineering

from the editor E d i t o r- i n - c h i e f : S t e v e M c C o n n e l l , C o n s t r u x S o f t w a r e , s o f t w a r e @ c o n s t r u x . c o m The Best Influences on Software Engineering

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Source URL: www.stevemcconnell.com

Language: English - Date: 2007-03-02 18:19:01
270Oscillators / Jitter / Phase-locked loop / Phase noise / Delay-locked loop / Clock recovery / Injection locking / Phase detector / Frequency synthesizer / Electronic engineering / Electronics / Electromagnetism

614 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 4, APRIL 2003 Jitter Transfer Characteristics of Delay-Locked Loops—Theories and Design Techniques

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Source URL: cva.stanford.edu

Language: English - Date: 2005-12-01 13:38:05
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